ABOUT
Anticipated Goals
Thrust 1
Atomic-scale metrology and inspection
- Developing image and spectrum technologies with Å-scaled resolution for structural and chemical composition analysis.
- Constructing surface and interfacial defect analysis techniques with Å-scaled resolution for semiconductor and multilayer structures.
- Long-term planning for the requirement of in-line process monitoring.
Thrust 2
Key materials for future devices
- Developing the growth techniques of high-quality, large-area low-dimensional semiconductors.
- Investigating key process modules for low-dimensional semiconductor devices.
- Exploring the new functional materials for low-energy devices in industrial applications.
Thrust 3
Angstrom-scale device and circuit
- Developing ultrahigh density 3D IC technology: Aiming at achieving the performance of 2030 equivalent 1-nm node in integration density and cost of logic and memory circuits, with 32 times improvement to the current technology.
- Developing ultralow energy switch devices and ultrahigh energy-efficiency computing architecture: Aiming at achieving the performance of 2030 equivalent 1-nm node, with 50 times and 1000 times improvement to the current technology, respectively.
Å尺度半導體檢測技術
本計畫目標發展Å尺度檢測技術，其不僅具備檢測缺陷的功能，還具有解析表面原子與電子結構的能力，達到非破壞性高解析結構與物性化性分析，並具半導體線上整合之未來性，進而提供足夠的資訊而設計有效的Å尺度元件製程以提高良率。
挑戰物理極限半導體元件材料
本計畫預期開啟新思維，以開發新穎低維半導體材料技術為基礎，並以開發關鍵元件技術為目標，期能透過挑戰物理極限的低維材料，為下世代前瞻半導體技術開啟新契機。
次奈米半導體元件與晶片關鍵技術探索
本計畫預期開發2030年所需之「GAME超高密度與能效之等效一奈米積體電路技術」，包含兩大關鍵技術開發：超高密度三維積體電路技術與極低能耗元件與運算架構。